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EPSRC Reference: EP/N031768/1
Title: Event-based parallel computing - partially ordered event-triggered systems (POETS)
Principal Investigator: Brown, Professor AD
Other Investigators:
Thomas, Professor DB Kazmierski, Dr T Yakovlev, Professor A
Moore, Professor S Mak, Dr T Jones, Professor TM
Reeve, Dr J Luk, Professor W Mokhov, Dr A
Researcher Co-Investigators:
Project Partners:
Chinese University of Hong Kong e-Therapeutics Plc Imagination Technologies Ltd UK
NMI (National Microelectronics Inst) Numerical Algorithms Group Ltd (NAG) UK UK Atomic Energy Authority
Department: Sch of Electronics and Computer Sci
Organisation: University of Southampton
Scheme: Programme Grants
Starts: 12 May 2016 Ends: 11 November 2022 Value (£): 4,981,302
EPSRC Research Topic Classifications:
Computer Sys. & Architecture Fundamentals of Computing
Networks & Distributed Systems
EPSRC Industrial Sector Classifications:
Electronics Healthcare
Energy Information Technologies
Related Grants:
Panel History:
Panel DatePanel NameOutcome
12 Feb 2016 Programme and Platform Grant Interviews - Feb 2016 (ICT) Announced
Summary on Grant Application Form
POETS (Partially Ordered Event Triggered Systems) is a significantly different way of approaching large, compute intensive problems. The evolution of traditional computer technology has taken us from simple machines with a handful of bytes of memory and (by the standards of today) glacial clock speeds, to multi-gigabyte architectures running five or six orders of magnitude faster, but with the same fundamental process at the heart: a central core doing one thing at a time. Over the past few years, architectures have appeared containing multiple cores, but exploiting these efficiently in the general case remains a 'holy grail' of computer science.

POETS takes an alternative approach, made possible only today by the proliferation of cheap, small cores and massive reconfigurable platforms. A previous EPSRC project, BIMPA, enabled us to assemble a million core machine, creating a kind of 'meta-computer'. Rather than program explicitly the behaviour of each core and each communication between them, as is done in conventional supercomputers, here the programmer defines a set of relatively small, simple behaviours for the set of cores, and leaves them to get on with it - with the right behavioural definitions , the system 'self-organises' to produce the desired results.

BIMPA was designed primarily for neuroscience applications, but a subsidiary research objective allowed us to study the use of the architecture for alternative (physics-based) problems, and we have demonstrated that this kind of approach can lead to dramatic speed increases over conventional solution techniques.

POETS is not a general-purpose computing technique, but it is elegantly suited to a variety of traditionally compute intensive engineering and research problems, where it can produce results orders of magnitude faster than conventional machines at a fraction of the cost.

The purpose of this research project is to explore this application arena: what kind of architectures are best (fastest)? How might they be automatically configured to self-organise? How might we build bridges between this new technology and a nascent user base? Industry has invested heavily - quite sensibly - in computing technology over the years, and if POETS is to become the disruptive technology we believe it to be capable of, we need to address a serious 'hearts and minds' issue for commercial uptake to ensue.

Key Findings
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Organisation Website: http://www.soton.ac.uk