EPSRC logo

Details of Grant 

EPSRC Reference: EP/C512804/1
Title: Next Generation Of Interconnection Technology For Multiprocessor SoC
Principal Investigator: Al-Hashimi, Professor B
Other Investigators:
Zwolinski, Professor M Reeve, Dr J
Researcher Co-Investigators:
Project Partners:
MBDA
Department: Electronics and Computer Science
Organisation: University of Southampton
Scheme: Standard Research (Pre-FEC)
Starts: 01 March 2005 Ends: 29 February 2008 Value (£): 260,473
EPSRC Research Topic Classifications:
System on Chip
EPSRC Industrial Sector Classifications:
Electronics
Related Grants:
EP/C512812/1
Panel History:  
Summary on Grant Application Form
This project, which is collaboration between the School of Electronics and Computer Science at the University of Southampton and the Department of Electrical, Electronic and Computer Engineering at the University of Newcastle, focuses on the development of scalable, reliable and energy-efficient interconnection technology needed by future multi-billion-transistor system-on-chips (SoCs) designed using nanometer CIVICS technology. This is a timely and necessary investigation if the microelectronics industry is to continue to produce SoCs for future application at affordable cost, as identified by the 2003 International Technology Roadmap for Semiconductors. Emphasis will be placed upon the employment of the emerging concept of Network-on-Chip (NoC) proposed to overcome complex onchip communication problems, where SoC cores communicate with each other using packets through interconnection network, thus providing support for communication infrastructure re-use, reliable and power efficient interconnection technology.For this research we will exploit expertise available at the collaborating universities that has recently produced efficient and low-power HW/SW co-design techniques that allow SoC designers to explore different system architectural designs (single/multi processors, hardware (ASIC and/or FPGA), asynchronous communication mechanisms (ACMs) and synchronization. The outcome of this research would be NoC based on-chip communication design methods, architectures, circuits and tools that are attractive for both industrial exploitation and further academic research. The research will be carried out in close collaboration with Prof P. Eles (Linkoping University, Sweden), Prof. L. Lavagno, Politecnico di Torino, and MBDA UK.
Key Findings
This information can now be found on Gateway to Research (GtR) http://gtr.rcuk.ac.uk
Potential use in non-academic contexts
This information can now be found on Gateway to Research (GtR) http://gtr.rcuk.ac.uk
Impacts
Description This information can now be found on Gateway to Research (GtR) http://gtr.rcuk.ac.uk
Summary
Date Materialised
Sectors submitted by the Researcher
This information can now be found on Gateway to Research (GtR) http://gtr.rcuk.ac.uk
Project URL: http://nirgam.ecs.soton.ac.uk/
Further Information:  
Organisation Website: http://www.soton.ac.uk