Details of Grant 

EPSRC Reference:	GR/S80080/01
Title:	Meeting the materials challenges of nano-CMOS electronics
Principal Investigator:	Shluger, Professor A
Other Investigators:	Stoneham, Professor AM
Researcher Co-Investigators:	Dr JL Gavartin Dr S Mukhopadhyay
Project Partners:	IBM UK Ltd International SEMATECH NASA Synopsys (International)
Department:	Physics and Astronomy
Organisation:	UCL
Scheme:	Standard Research (Pre-FEC)
Starts:	01 December 2004	Ends:	30 November 2008	Value (£):	439,638
EPSRC Research Topic Classifications:	Electronic Devices & Subsys. Materials Characterisation
EPSRC Industrial Sector Classifications:	Electronics Information Technologies
Related Grants:	GR/S80097/01
Panel History:
Summary on Grant Application Form
Consoritum of UCL, Glasgow University and NASA ARC materials modelling initiativeThe further CIVICS scaling to sub 10nm scale creates new materials challenges for which the modelling of materials, interfaces, dopants, and defects will play key roles in process design and device performance enhancement. Intrinsic parameter fluctuations will be a major factor limiting the scaling and integration of such devices.This consortium will bridge the gap between materials modelling and the framework of electrical device simulation. We will develop tools and approaches to simulate materials, interfaces and defects, which determine the performance of nano-CMOS devices and will connect them to appropriate device simulators. We will combine (1) atomistic and electronic structure calculations of device materials, with (2) the studies of the transport properties of devices based on the Non-equilibrium Green's Function (NEGF) techniques, and (3) with full 3D statistical device simulations.We will then investigate, using simulations, the origins and magnitudes of intrinsic parameter fluctuations introduced by new materials like high-k dielectrics, SiGe and pure Ge in non-conventional nano-CMOS devices with sub 10 nm dimensions, including thin body silicon on insulator (SO[), planar and vertical multigate transistors. We plan to understand the importance of each individual source of intrinsic parameter fluctuations and their combined effect and to assess and compare ways to enhance fluctuation resistance in nano-CMOS transistors.
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