| EPSRC Reference: |
GR/L24038/01 |
| Title: |
ASYNCHRONOUS CIRCUIT SYNTHESIS AND TESTING (ASTI) |
| Principal Investigator: |
Yakovlev, Professor A |
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| Department: |
Computing Sciences |
| Organisation: |
Newcastle University |
| Scheme: |
Standard Research (Pre-FEC) |
| Starts: |
01 April 1997 |
Ends: |
30 September 1998 |
Value (£): |
6,000
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Summary on Grant Application Form |
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1. Work towards better technology mapping will tackle a global problem of implementability of speed-independent circuits in more realistic logic bases than the basis of complex gates. The new techniques for manipulating specifications, based on state graph regions, will be combined with the formal criteria for hazard-free implementations, such as Monotonic Cover conditions.2. The novel method of reducing path delay faults in an asynchronous net to stuck-at faults and leading to more efficient test generation, will be extended to test generation under partial scan based on the observability conditions for a transition propagation along the path in asynchronous net. These conditions will be formulated in terms of boolean characteristic functions thus allowing the use of BDDs. Event-based framework (STGs and unfoldings) will be studied for functional stuck-at testing (non-scan method) to improve coverage possible stuck-at faults with faster testing time than using scan methods.
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Key Findings |
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This information can now be found on Gateway to Research (GtR) http://gtr.rcuk.ac.uk
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Potential use in non-academic contexts |
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This information can now be found on Gateway to Research (GtR) http://gtr.rcuk.ac.uk
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Impacts |
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| Description |
This information can now be found on Gateway to Research (GtR) http://gtr.rcuk.ac.uk |
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| Date Materialised |
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Sectors submitted by the Researcher |
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This information can now be found on Gateway to Research (GtR) http://gtr.rcuk.ac.uk
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| Project URL: |
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| Further Information: |
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| Organisation Website: |
http://www.ncl.ac.uk |