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Details of Grant 

EPSRC Reference: GR/K73473/01
Title: PARALLEL 3D FINITE ELEMENT SIMULATION OF CELLULAR POWER SEMICONDUCTOR DEVICES
Principal Investigator: Asenov, Professor A
Other Investigators:
Barker, Professor JR Evans, Professor DJ
Researcher Co-Investigators:
Project Partners:
Zarlink
Department: Electronics and Electrical Engineering
Organisation: University of Glasgow
Scheme: Standard Research (Pre-FEC)
Starts: 01 September 1995 Ends: 31 August 1998 Value (£): 138,732
EPSRC Research Topic Classifications:
Power Electronics
EPSRC Industrial Sector Classifications:
Electronics
Related Grants:
Panel History:  
Summary on Grant Application Form
Due to the complicated behaviour of power semiconductor devices, numerical modelling has become an important and widely accepted approach for device analysis and optimisation. In this project we aim to develop a highly efficient, portable and scalable parallel 3D finite element simulator for cellular power semiconductor devices, applicable for practical device engineering. We will achieve this goal by combining the new Spatial Device Decomposition (SDD) approach based on topologically rectangular FE grids recently advanced by the Glasgow Modelling group, and the expertise of the Parallel Algorithm Research Centre at Loughborough University of Technology in the design of efficient parallel solvers.The immediate need for an efficient 3D simulator was identified during our collaboration with GEC Plessey Semiconductors under the LINK PEDDS programme (EPSRC grant GR/H23085).
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Organisation Website: http://www.gla.ac.uk