| EPSRC Reference: |
GR/K62941/01 |
| Title: |
SYNTHESIS OF APPLICATION SPECIFIC DSP CHIPS USING SYSTEM LEVEL SILICON ALGORITHMS |
| Principal Investigator: |
McCanny, Professor Sir JV |
| Other Investigators: |
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| Project Partners: |
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| Department: |
Sch of Electronics, Elec Eng & Comp Sci |
| Organisation: |
Queen's University of Belfast |
| Scheme: |
ROPA |
| Starts: |
01 December 1995 |
Ends: |
28 February 1999 |
Value (£): |
134,671
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| EPSRC Research Topic Classifications: |
| Digital Signal Processing |
VLSI Design |
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Summary on Grant Application Form |
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Research will be undertaken to investigate methods for the automated design of complex, application specific Signal and Image Processing chips. Attention will be focused on the high level capture of silicon algorithm-to-architectures mappings for core DSP functions using Dependence or Computational Flow Graphs. This will be linked to two related design automating tools (IRIS and DAC) with the aim of demonstrating that efficient, high quality, Signal Compression DSP chips can be generated from very high level functional block descriptions.
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Key Findings |
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This information can now be found on Gateway to Research (GtR) http://gtr.rcuk.ac.uk
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Potential use in non-academic contexts |
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This information can now be found on Gateway to Research (GtR) http://gtr.rcuk.ac.uk
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Impacts |
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| Description |
This information can now be found on Gateway to Research (GtR) http://gtr.rcuk.ac.uk |
| Summary |
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| Date Materialised |
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Sectors submitted by the Researcher |
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This information can now be found on Gateway to Research (GtR) http://gtr.rcuk.ac.uk
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| Project URL: |
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| Further Information: |
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| Organisation Website: |
http://www.qub.ac.uk |