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Name: |
Professor Sir JV McCanny |
Organisation: |
Queen's University of Belfast |
Department: |
Sch of Electronics, Elec Eng & Comp Sci |
Current EPSRC-Supported Research
Topics: |
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Current EPSRC Support |
There is no current EPSRC Support |
Previous EPSRC Support |
EP/R007187/1 | Academic Centre of Excellence in Cyber Security Research - Queen's University Belfast | (P) |
EP/N508664/1 | CSIT 2 | (P) |
EP/K004379/1 | Academic Centre of Excellence in Cyber Security Research - Queen's University Belfast | (P) |
EP/J006238/1 | Centre for Secure Information Technologies - Tranche 2 Proposal | (P) |
EP/H049606/1 | Centre for Secure Information Technologies (CSIT) | (P) |
EP/G034303/1 | Centre for Secure Information Technologies (CSIT) | (P) |
GR/M66745/01 | SYSTEM-ON-A-CHIP DESIGN OF AN RLS ADAPTIVE BEAMFORMER | (P) |
GR/L79823/01 | PROF S.Y. KUNG, PRINCETON UNI - APPOINTMENT AS A VISITING PROFESSOR TO QUEENS UNIVERSITY OF BELFAST | (P) |
GR/L27817/01 | LOW POWER ARCHITECTURES, CIRCUITS AND TECHNOLOGIES (POWERPACK) | (C) |
GR/K62941/01 | SYNTHESIS OF APPLICATION SPECIFIC DSP CHIPS USING SYSTEM LEVEL SILICON ALGORITHMS | (P) |
GR/J47729/01 | ARCHITECTURAL SYNTHESIS OF VLSI SIGNAL PROCESSING CHIPS | (C) |
GR/G64909/01 | SIGNAL PROCESSING TECHNIQUES FOR MOTION COMPENSATED TELEVISION SYSTEMS(MOTION COMPENSATION FOR TELEVISION) | (P) |
GR/H18791/01 | CAD TOOLS FOR THE AUTOMATED DESIGN OF HIGH PERFORMANCE DSP CHIPS | (P) |
GR/F91254/01 | THE DESIGN OF A VERY HIGH PERFORMANCE SECOND ORDER IIRFILTER CHIP | (P) |
GR/F39225/01 | SYSTOLIC ARRAYS FOR HIGH PERFORMANCE DIGITAL SIGNAL PROCESSING | (P) |
GR/E77008/01 | A VECTOR TRANSFORM APPROACH TO LOW BIT RATE SPEECH CODING | (P) |
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Key: (P)=Principal Investigator, (C)=Co-Investigator, (R)=Researcher Co-Investigator
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