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| Name: |
Dr I Jalowiecki |
| Organisation: |
Brunel University London |
| Department: |
Electronic & Computer Engineering |
| Current EPSRC-Supported Research
Topics: |
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| Current EPSRC Support |
| There is no current EPSRC Support |
| Previous EPSRC Support |
| GR/J88050/01 | A FAULT-TOLERANT ACTIVE-SUBSTRATE TECHNIQUE TO REDUCE COST AND ENSURE ON-TIME DELIVERY | (C) |
| GR/J13830/01 | AN INVESTIGATION INTO TEST STRATEGIES FOR MULTI CHIP MODULES | (P) |
| GR/H46893/01 | AN INVESTIGATION OF A DISTRIBUTED PARALLEL ASSOCIATIVE PROCESSOR FOR THE EXECUTION OF LOGIC PROGRAMS | (C) |
| GR/H20077/01 | HIERARCHICAL RESIDUE NUMBER SYSTEM ARCHITECTURES | (P) |
| GR/F36729/01 | INTERCONNECTION TECHNOLOGIES FOR MULTICHIP ASSEMBLIES | (C) |
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Key: (P)=Principal Investigator, (C)=Co-Investigator, (R)=Researcher Co-Investigator
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