Details of Grant 

EPSRC Reference:	GR/S79572/01
Title:	Architecture and Compiler Infrastructure for Flexible Cellular Multiprocessing
Principal Investigator:	Cintra, Dr M
Other Investigators:	O'Boyle, Professor M
Researcher Co-Investigators:
Project Partners:
Department:	Sch of Informatics
Organisation:	University of Edinburgh
Scheme:	Standard Research (Pre-FEC)
Starts:	01 May 2004	Ends:	31 August 2007	Value (£):	283,989
EPSRC Research Topic Classifications:	Parallel Computing
EPSRC Industrial Sector Classifications:	Information Technologies
Related Grants:
Panel History:
Summary on Grant Application Form
Traditionally, parallelism within a single application has been exploited in two forms: thread-level parallelism (TLP), and instruction-level parallelism (ILP). To perform well across a broad range of applications the architecture must be able to dynamically exploit both types of parallelism. Unfortunately, there is often some mismatch between application and architecture. One example of such mismatch are the recent cellular architectures, which rely entirely on large amounts of TLP.This project proposes to investigate polymorphous cellular architectures that can dynamically adapt to the form of the available parallelism in the application. This is an emerging technology, but current architectures can only accommodate very coarse grain configuration changes. We intend to explore novel architectural and compiler solutions to overcome these limitations. This will first include a systematic analysis of ILP and TLP behaviour across a range of applications. We will then investigate architectural extensions to the issue logic and to the reconfiguration capabilities of polymorphous cellular architectures to dynamically adapt to ILP and TLP availability. On the compiler side, after developing static analysis to detect the most profitable form of parallelism, later work will investigate adaptive dynamic compilation and speculative parallelism as a means of improving performance.
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Organisation Website:	http://www.ed.ac.uk