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Details of Grant 

EPSRC Reference: GR/S71835/01
Title: Characterisation of a new class of thin film transistors
Principal Investigator: Shannon, Professor J
Other Investigators:
Sealy, Professor B
Researcher Co-Investigators:
Project Partners:
Philips
Department: Sch of Electronics & Physical Sciences
Organisation: University of Surrey
Scheme: Standard Research (Pre-FEC)
Starts: 09 August 2004 Ends: 08 January 2008 Value (£): 258,144
EPSRC Research Topic Classifications:
Displays Electronic Devices & Subsys.
EPSRC Industrial Sector Classifications:
Electronics
Related Grants:
Panel History:  
Summary on Grant Application Form
We propose to assess the properties of a new class of thin film transistor which we believe will make a major impact in electronic systems and circuits. The transistor named the source gated transistor has a number of advantages compared with its nearest relative, the field effect transistor. Transistors will be fabricated in hydrogenated amorphous silicon and assessed in the context of active matrix addressing of current driven emissive displays. We propose to examine both analogue and digital behaviour and the potential of the source gated transistor at high frequencies. The main objective is to obtain a good understanding of the behaviour of the source gated transistor and its benefits not only for active matrix addressing but for electronics as a whole.
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Further Information:  
Organisation Website: http://www.surrey.ac.uk