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Details of Grant 

EPSRC Reference: GR/S62284/01
Title: Pushing the Limits of CMOS in Analogue to Digital & Digital to Analogue Conversion & Sensing Using Floating Gate MOS Transistor
Principal Investigator: Rodriguez, Dr E
Other Investigators:
Researcher Co-Investigators:
Project Partners:
Department: Electrical and Electronic Engineering
Organisation: Imperial College London
Scheme: First Grant Scheme Pre-FEC
Starts: 28 January 2004 Ends: 27 February 2007 Value (£): 125,027
EPSRC Research Topic Classifications:
VLSI Design
EPSRC Industrial Sector Classifications:
Electronics Healthcare
Related Grants:
Panel History:  
Summary on Grant Application Form
Previous research by the applicant resulted in novel micropower continuous time filters, which being designed with Floating Gate MOS transistors in non-submicrometrical conventional CMOS technologies ( with the only required feature of a double poly layer), worked at a voltage supply up to 2V under the limit established by the foundry. The performance of these circuits was also in the state of the art in terms of power consumption, Dynamic Range and area.The proposed research will move beyond mere circuits, investigating the new limits of technologies in more complex systems and unavoidable blocks in the interfacing between the real world and electronics: A/D and D/A converters. Until now, no system has been reported using the FGMOS in the aforementioned context and without any post-fabrication step. The second main milestone of the proposed research is the design and fabrication of an ultra low powerfully programmable multi-channel FGMOS potentiostat chip that interfacing with a multi-electrode array constitute a neurochemical sensor system to spatially sense and process neurotransmitters. This system is expected to serve as a valuable tool for neurophysiological research and implantable prostheses.
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Organisation Website: http://www.imperial.ac.uk