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EPSRC Reference: GR/S42897/01
Title: Secure Systems using Polysilicon TFTs on Polymer Substrates
Principal Investigator: Moore, Professor S
Other Investigators:
Migliorato, Professor P Anderson, Professor R Moore, Dr DF
Researcher Co-Investigators:
Project Partners:
Epson (UK) Ltd
Department: Computer Science and Technology
Organisation: University of Cambridge
Scheme: Standard Research (Pre-FEC)
Starts: 01 October 2003 Ends: 30 September 2006 Value (£): 331,672
EPSRC Research Topic Classifications:
Electronic Devices & Subsys. VLSI Design
EPSRC Industrial Sector Classifications:
Financial Services Retail
Electronics
Related Grants:
Panel History:  
Summary on Grant Application Form
Inline with Kerckhoffs' principle, the security of consumer electronic devices typlically involves keeping the key secret, so extracting the key should be economically unattractive. Current silicon devices are so robust that chemical and mechanical attacks are relatively easy. They are also planar which makes them vulnerable to optical and mechanical probing from the top and bottom. Recent developments in polysilicon transistor technology allows us to construct a multilayered device, with an active defence grid of sensors enveloping the cryptographic functions. The polysilicon layers can be deposited on a polymer substrate that forms the case of the device. Thus, we believe that the device will be very hard to depackage and will be highly resistant to attack during operation. There are numerous design challenges to overcome: from the design of sensors which form part of the defence grid, through to digital circuits which are tolerant to the wide variation of transistor performance (due to the large variation in Vt) associated with polysilicon TFT technology, whilst minimising data dependent power emissions which can leak secret information. We also need to further the technology for security analysis of hardware devices.
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Organisation Website: http://www.cam.ac.uk