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Details of Grant 

EPSRC Reference: GR/S24053/01
Title: Primitive Computation - A Paradigm for ULTRA Low Power High Performance Reconfigurable SoC
Principal Investigator: Arslan, Professor T
Other Investigators:
Lindsay, Dr I Thompson, Professor JS
Researcher Co-Investigators:
Project Partners:
Epson (UK) Ltd Institute for System Level Integration Wolfson Microelectronics
Department: Sch of Engineering
Organisation: University of Edinburgh
Scheme: Standard Research (Pre-FEC)
Starts: 01 January 2004 Ends: 30 June 2007 Value (£): 496,606
EPSRC Research Topic Classifications:
System on Chip
EPSRC Industrial Sector Classifications:
Electronics
Related Grants:
Panel History:  
Summary on Grant Application Form
Current solutions offered for providing programmable/reconfigurable SoC have severe restriction in terms of almost all performance characteristics. These being speed, area and power. Furthermore, these existing solutions are mainly dictated by the pre-SoC products which existed in the market. Clearly there is an urgent need for new computing paradigms and architectures for the design of reconfigurable SoC systems specially for high performance applications. Research into these paradigms and architectures must considerable key application areas and then proceed with a systematic research into all stages of the design process.This proposal describes research targeting the development of a new paradigm for the design of reconfigurable SoC systems for high performance applications. This new paradigm, I term primitive computation will lead into the development of complete SoC solutions which will provide much higher performance in terms of area, speed, and power than solutions available in the market.
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Organisation Website: http://www.ed.ac.uk