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Details of Grant 

EPSRC Reference: GR/S21243/01
Title: SiGeC Heterostructures for CMOS Technology
Principal Investigator: Parker, Professor E
Other Investigators:
Whall, Professor TE
Researcher Co-Investigators:
Project Partners:
Department: Physics
Organisation: University of Warwick
Scheme: Overseas Travel Grants Pre-FEC
Starts: 09 September 2002 Ends: 08 December 2002 Value (£): 3,630
EPSRC Research Topic Classifications:
Condensed Matter Physics Electronic Devices & Subsys.
Materials Synthesis & Growth
EPSRC Industrial Sector Classifications:
Electronics
Related Grants:
Panel History:  
Summary on Grant Application Form
The phenomenal advance of conventional silicon CMOS technology, which has previously been possible by reductions in feature size, will be severely hampered in the next 5-15 years. The proposed research addresses this problem by the development of an alternative SiGeC based functional materials system giving substantial enhancements in carrier mobility. Major features of this investigation will include factors influencing carrier mobility such as interface roughness, the link between carrier mobility and the velocity overshoot effects which lead to enhanced performance at 0.1 um, the noise performance of these devices, the development of commercially viable strain tuning virtual substrates having defect concentrations <105cm-2, control of dopant solubility and diffusivity (by use of Ge and C), the development of low thermal budget and high k dielectrics for these heterostructure devices, the development of low resistance sources and drains using SiGe, SiGe as a processing aid and novel device concepts in SiGe, e.g. DTMOS.
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Organisation Website: http://www.warwick.ac.uk