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Details of Grant 

EPSRC Reference: GR/R73867/01
Title: PLATFORM GRANT - asynchronous logic systems and tools
Principal Investigator: Furber, Professor S B
Other Investigators:
Brackenbury, Dr L Garside, Dr JD Edwards, Dr DA
Researcher Co-Investigators:
Project Partners:
Department: Computer Science
Organisation: Victoria University of Manchester, The
Scheme: Standard Research (Pre-FEC)
Starts: 01 October 2002 Ends: 31 March 2003 Value (£): 425,717
EPSRC Research Topic Classifications:
System on Chip VLSI Design
EPSRC Industrial Sector Classifications:
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Panel History:  
Summary on Grant Application Form
The Amulet group has spent a decade developing large-scale asynchronous VLSI designs to demonstrate the feasibility, technical advantages and commercial viability of asynchronous design techniques. The work has attracted significant funding from Europe, the EPSRC and industry.Research into asynchronous design techniques has now reached a turning point. Demonstrators built by the Amulet group (and others) clearly show that asynchronous design has a lot to offer, and solutions to many of the fundamental problems have been found. What is required now is to overcome industrial reluctance to adopt asynchronous techniques so that the work can have greater impact.The long-term strategic goals of the group are therefore to diversify, placing more emphasis on tools that can automate the synthesis of asynchronoi systems from high-level descriptions and heterogeneous timing systems, where clocked and asynchronous components co-exist harmoniously on the same chip. In addition, a new line of 'blue sky' research into large-scale asynchronous hardware support for neural networks is evolving.A Plafform Grant will enable the group to develop these strategic new directions from a strong base.
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