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Details of Grant 

EPSRC Reference: GR/R16747/01
Title: Reconfigurable Computing: Models, Systems and Applications
Principal Investigator: Brebner, Professor G
Other Investigators:
Researcher Co-Investigators:
Project Partners:
Department: Sch of Informatics
Organisation: University of Edinburgh
Scheme: Standard Research (Pre-FEC)
Starts: 07 November 2000 Ends: 06 November 2001 Value (£): 4,700
EPSRC Research Topic Classifications:
System on Chip
EPSRC Industrial Sector Classifications:
Related Grants:
Panel History:  
Summary on Grant Application Form
Reconfiguration of circuitry at runtime is a new dimension in computing that blurs traditional barriers between hardware and software components. Configurable logic is now becoming available as one of the different types of component for systems on chip, so practical implementations can move on from the limitations of Field Programmable Gate Array (FPGA) chips on boards. Many issues are raised by reconfigurable circuitry, from apt computational models, through apt design/programming methodologies and operating systems, to apt applications.The aim of this project is to build on our recent research into different aspects of reconfigurable computing -including system architecture, programming, operating systems and communications applications -by using sabbatical leave to take up invitations to visit the three main reconfigurable computing research groups in Australia, at the University of New South Wales, the University of South Australia and Queensland Institute of Technology. Complementary interests with each group exist, and will enable productive research collaboration in the future.This project has three main goals: to discuss the current research activities of the host research groups in detail; to develop an agenda for future collaborative research activities; and to strengthen the UK's international research presence in reconfigurable computing and system level integration.
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