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Details of Grant 

EPSRC Reference: GR/L27756/01
Title: LOW POWER ARCHITECTURES, CIRCUITS AND TECHNOLOGIES (POWERPACK)
Principal Investigator: Ivey, Professor P
Other Investigators:
Seed, Dr NL
Researcher Co-Investigators:
Project Partners:
Department: Electronic and Electrical Engineering
Organisation: University of Sheffield
Scheme: Standard Research (Pre-FEC)
Starts: 19 May 1997 Ends: 18 February 2001 Value (£): 253,558
EPSRC Research Topic Classifications:
VLSI Design
EPSRC Industrial Sector Classifications:
Electronics
Related Grants:
Panel History:  
Summary on Grant Application Form
Low power circuit design methods vary from highly optimised micropower CMOS techniques to radical new concepts of energy saving such as adiabatic logic. Frequently, these techniques have limited domains of applicability - some require highly specialised fabrication processes and many are incompatible with the leading CAD tools available. This makes them unsuitable for large scale implementation in the short term. One objective of the research is to survey the contemporary techniques and establish their applicability. The bulk of the work will be in establishing a library of commonly required macro-modules. Use will be made of several circuit techniques and design styles and a variety of power saving techniques. New design methods will be examined and each completed design will be fully characterised for speed, area, and power consumption. The criteria which have been established will be generalised to give the optimum choice for a particular set of circumstances. The results will be integrated into a standard design environment. Test circuits will be fabricated at one year intervals. A full understanding of the operation of these circuits will allow sensible trade-offs to be made when designing the final test chip which will incorporate the results from earlier in the project.
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Organisation Website: http://www.shef.ac.uk