Details of Grant 

EPSRC Reference:	GR/J11980/01
Title:	OPTIMISATION TECHNIQUES FOR DSP-BASED SYNCHRONISERS.
Principal Investigator:	Darnell, Professor M
Other Investigators:	Grayson, Dr M
Researcher Co-Investigators:
Project Partners:
Department:	Electronic Engineering
Organisation:	University of Hull
Scheme:	Standard Research (Pre-FEC)
Starts:	01 October 1993	Ends:	31 August 1995	Value (£):	84,980
EPSRC Research Topic Classifications:	Digital Signal Processing
EPSRC Industrial Sector Classifications:
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Panel History:
Summary on Grant Application Form
(i) To investigate the application of new synchronisation techniques to complex modulation and coding schemes; (ii) To investigate adaption of synchroniser parameters in response to channel state;(iii) To implement the synchroniser in a DSP architecture;(iv) To investigate the design of synchronisation preambles for complex modulation schemes.Progress:The first year of the programme has concentrated on precise analysis and modelling of DSP-based maximum-likelihood symbol synchroniser, with particular emphasis on the characterisation of synchronisation slips . A comprehensive exemplar model of a phase-locked loop (PLL) synchroniser has now been produced which can predict conditions under which slips will occur, and in which sense they occur. This has involved the derivation of a rigorous solution to the transient behaviour of the PLL. By using the model, it has been possible to identify metrics which could be used for slip detection and correction in a practical DSP-based implementation. It is planned to extend the work to consider another form of maximum-likelihood synchroniser, i.e. the modulation-derived symbol synchroniser (MDSS) and to evaluate this against the PLL from the viewpoint of ease of slip detection and correction. The project will then proceed to a real-time DSP implementation of the two synchronisation algorithms, and an investigation of adaptive operation in response to changes in transmission channel state. The interaction of synchronisation with modulation and error control within a multi-functional DSP architecture will also be considered. Two book chapters have been published on this work. This is a joint programme with the University of Lancaster; it is intended to transfer that element previously at the University of Hull to the University of Leeds w.e.f. 01.05.95.
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Organisation Website:	http://www.hull.ac.uk