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EPSRC Reference: GR/H78429/01
Title: LOGIC SYNTHESIS BASED ON A MIXED EXCLUSIVE/INCLUSIVE-OR REPRESENTATION
Principal Investigator: Dagless, Professor EL
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Researcher Co-Investigators:
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Department: Electrical and Electronic Engineering
Organisation: University of Bristol
Scheme: Standard Research (Pre-FEC)
Starts: 01 December 1992 Ends: 31 December 1995 Value (£): 110,932
EPSRC Research Topic Classifications:
Design & Testing Technology
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Summary on Grant Application Form
The development of algorithms to produce and manipulate a mixed exclusive/inclusive-OR sum of products. The investigation of practical and theoretical bounds on the number of terms in the representation. The development of a simple specification language for arithmetic circuits.Progress:Research has been carried out to explore the possibility of creating a representation simultaneously using inclusive - and exclusive OR sum of products to specify the synthesised function. An algorithm has been proposed for multilevel decomposition that uses the more economical of the two representations to specify each subexpression of the function, resulting in a mixed multilevel exclusive/ inclusive-OR representation [1] . Prospects of a mixed representation have been investigated and an algorithm for transforming inclusive-OR sum of product expressions into fixed polarity exclusive-OR sum of product expansions has been developed [2]. The size of the fixed polarity exclusive-OR sum of product expansions strongly depends on the chosen polarity. Thus, an algorithm for determining an optimal polarity has also been developed [3]. As exclusive-OR based logic synthesis is relatively immature in comparison with inclusive-OR based synthesis, tools for manipulating exclusive-OR sum of product expressions cannot guarantee minimum solutions for a given function. To improve exclusive-OR based function manipulation a minimisation algorithm MINT has been developed, which produces the best exclusive-OR sum of product minimisation results in comparison with other minimisers known [4]. References[1] J.M. Saul, Towards a mixed exclusive/ inclusive-OR factored form , in IFIP Workshop on Applications of the ReedMuller Expansion in Circuit Design, Sept. 1993, pp.1-5. [2] T. Kozlowski, N. Lester, and J.M. Saul, Logic synthesis using both inclusive-OR and exclusive-OR sums of products , in IEE Colloquium on Synthesis and Optimisation of Logic Systems Mar. 1994, pp.1/1-1/6, Digest IEE No. 1994/066.[3] T. Kozlowski, E.L. Dagless, and J.M. Saul, Reed-Muller expansions for switching function synthesis , in Proceedings of the 1st International Conference on ASIC - ASICON '94,Oct. 1994, pp.108-111. [4] T. Kozlowski, E.L. Dagless, and J.M. Saul, An enhanced algorithm for the minimisation of exclusive-OR sum of products for incompletely specified functions ,Submitted to the International Conference on Computer Design - ICCD '95.
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