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Details of Grant 

EPSRC Reference: GR/H76944/01
Title: HIGH SPEED SWITCHED-CURRENT TECHNIQUES FOR FRONT-END/ANALOGUE SIGNAL PROCESSING APPLICATIONS
Principal Investigator: Toumazou, Professor C
Other Investigators:
Researcher Co-Investigators:
Project Partners:
Department: Electrical and Electronic Engineering
Organisation: Imperial College London
Scheme: Standard Research (Pre-FEC)
Starts: 01 October 1992 Ends: 30 November 1995 Value (£): 105,415
EPSRC Research Topic Classifications:
Design & Testing Technology
EPSRC Industrial Sector Classifications:
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Summary on Grant Application Form
The project is concerned with the design and development of high-speed switched current techniques for front-end analogue signal processing applications in CMOS and Gallium Arsenide technology. The work in CMOS will concentrate upon the application of innovative cell designs to system level applications, whilst the work in Gallium Arsenide will primarily be a demonstration of the feasibility of the technique and will aim to develop a number of high performance cells. Progress:The switched current technique is a recently pioneered technique which allows precision high performance analogue processing on digital CMOS VLSI technology.To date a number of novel circuits and systems using CMOS, BiCMOS and GaAs switched current techniques have been developed for high frequency operation as part of the research.A new generation of GaAs MESFET and GaAs HEMT switched current architectures have been invented and several demonstrator chips realised to confirm performance. In particular, a GaAs biquad filter has been realised and clocked at 1GHz. A novel switched current tuning technique has been pioneered, known as switched transconductance techniques. The method allows continuous-time tuning of precision discrete time cells. A patent is pending on this work. In silicon technology the feasibility of a switched current oversampling S' - D modulator has been demonstrated for 3.3 volt supply operation. A 40 MHz clock rate BiCMOS switched current cell has also been realised. A test chip comprising the first high order bilinear Elliptic switched current filter has been successfully integrated in a 1.2-m digital CMOS technology. Deliverables to date have been: four fully functional test chips, novel circuit techniques which push the speed limits of GaAs and silicon for precision sampled data processing on digital VLSI technology, 10 international publications, 2 book chapters and a patent. Throughout the project there has been very close collaboration with industry. It is intended to exploit the CMOS switched current techniques for video applications and the GaAs switched current systems for fully integrated receivers for digital mobile communication systems operating in the GHz band. The work has demonstrated that very high performance precision analogue processing can be accomplished on standard digital VLSI technologies.
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Organisation Website: http://www.imperial.ac.uk