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Details of Grant 

EPSRC Reference: GR/F99083/01
Title: PARALLEL RECONFIGURABLE IMAGE PROCESSING SYSTEMS
Principal Investigator: Clark, Dr AF
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Department: Computing and Electronic Systems1
Organisation: University of Essex
Scheme: Standard Research (Pre-FEC)
Starts: 01 October 1991 Ends: 30 June 1995 Value (£): 286,155
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Summary on Grant Application Form
to devise parallel algorithms and software systems capable of dynamic adaptation to run on a range of parallel architectures to identify common paradigms for the effective use of dynamic reconfiguration to carry out detailed studies, ranging from pixel-oriented processing to high-level image understanding tasks to contribute to ISO imaging standardsProgress:Much work has been carried out into the mechanisms of achieving dynamic reconfiguration on a general-purpose parallel computer (a Parsys supernode) and into exploiting this capability in image processing algorithms. For many pixel-oriented algorithms, the general approach that has been adopted is to configure the processor as a set of linear chains, with a 'master' processor cycling between the chains by means of reconfiguration to distribute or receive data. In these cases, the number of processor chains and their lengths may be predicted and optimised by several methods, including linear programming, queuing theory, and a scheme based on diffusion theory. Algorithms for which this cyclically-switching approach is inappropriate, such as image rotation, have also been investigated. Essex's partners in this collaborative project have concentrated on higher-level tasks. Implementations of the same algorithms have also been performed on networks of Unix workstations using the Parallel Virtual Machine (PVM) communication kernel, as we anticipate this general approach to exploiting parallelism will quickly become the norm. The performance-prediction schemes alluded to above have also been applied to this case with some success, even though the performance bottlenecks are somewhat different. Effort has also been put into the development of the International Standard 'Image Processing and Interchange', to be published in 1995. The above mentioned implementations are being integrated into a demonstrator which will provide both a command language and graphical user interfaces. Image processing operations adapt to the number of processors available, with a load-balancing scheme that employs aspects of the performance-prediction work.
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Organisation Website: http://www.sx.ac.uk