EPSRC Reference: |
GR/S04314/01 |
Title: |
Visiting Fellowship for Professor Steven Nowick |
Principal Investigator: |
Edwards, Dr DA |
Other Investigators: |
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Department: |
Computer Science |
Organisation: |
Victoria University of Manchester, The |
Scheme: |
Standard Research (Pre-FEC) |
Starts: |
10 September 2002 |
Ends: |
09 August 2003 |
Value (£): |
48,215
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Summary on Grant Application Form |
Currently, there are two leading asynchronous CAD tools: Balsa (University of Manchester) and Tangram (Philips). Each is a silicon compiler , translating a high-level concurrent system description into an asynchronous circuit. The compilers have been successfully used in large real-world applications, including commercial chips. However, in practice, the tools produce circuits with significant performance and area penalties, due to their reliance on straightforward syntax-directed translation.The goal of this proposal is to address this bottleneck: to create a high-quality back-end optimizer for the Balsa synthesis system. Three major contributions are proposed: (i) a new hardware modelling language which can capture the proposed circuit transformations; (ii) a powerful new set of circuit transformations, which manipulate an unoptimised Balsa implementation into a highly-optimized one; and, (iii) experimental evaluation of the new optimizer on large examples, including an ARM microprocessor. Transformations will range from simple behaviour-preserving to radical restructuring transformations which explore variations in communication protocols and degrees of parallelization.The aim is to leverage the power and practicality of the existing Balsa tool, but to produce circuits with much better performance.
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Key Findings |
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Potential use in non-academic contexts |
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Impacts |
Description |
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Summary |
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Date Materialised |
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Sectors submitted by the Researcher |
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