EPSRC Reference: |
GR/N13159/01 |
Title: |
SPECIFICATION AND VERIFICATION OF ARM6 |
Principal Investigator: |
Cohn, Professor AG |
Other Investigators: |
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Researcher Co-Investigators: |
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Project Partners: |
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Department: |
Sch of Computing |
Organisation: |
University of Leeds |
Scheme: |
Standard Research (Pre-FEC) |
Starts: |
01 October 2000 |
Ends: |
30 September 2003 |
Value (£): |
206,505
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EPSRC Research Topic Classifications: |
Fundamentals of Computing |
Parallel Computing |
System on Chip |
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EPSRC Industrial Sector Classifications: |
No relevance to Underpinning Sectors |
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Related Grants: |
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Panel History: |
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Summary on Grant Application Form |
We propose to help develop a mthodology for the production of executable specifications of microprocessors cores at both the instruction set and pipelined architectural levels and to use formal verification to establsih equivalence or refinement relationships between these specifications. The key technical challenge is to show that academic verification techniques developed in the 1980's for microprocessor subsystems scale to realistic complete archtectures. The project is a partnership between specifiers and verifiers at Leeds and Cambridge, and designers and engineers from ARM who will actively participate by providing understanding and insights, and reading and critiquing specifications as they emerge. We concentrate upon the ARM6 microprocessor to give the project a concrete focus, but the results and methods will be generally applicable.
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Key Findings |
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Potential use in non-academic contexts |
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Impacts |
Description |
This information can now be found on Gateway to Research (GtR) http://gtr.rcuk.ac.uk |
Summary |
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Date Materialised |
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Sectors submitted by the Researcher |
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Project URL: |
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Further Information: |
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Organisation Website: |
http://www.leeds.ac.uk |