| EPSRC Reference: |
GR/K79987/01 |
| Title: |
SYNTHESIS OF DATAPATH DOMINATED DESIGNS ONTO MULTIPLE FPGA'S |
| Principal Investigator: |
Hendry, Dr DC |
| Other Investigators: |
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| Department: |
Engineering |
| Organisation: |
University of Aberdeen |
| Scheme: |
Standard Research (Pre-FEC) |
| Starts: |
01 February 1996 |
Ends: |
31 January 1999 |
Value (£): |
103,590
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| EPSRC Research Topic Classifications: |
| Design & Testing Technology |
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Summary on Grant Application Form |
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This project will investigate methods of mapping datapaths onto multiple field progrmamable gate arrays (FPGAs). Thus simple algorithms expressed in a high level language will be mapped to a number of FPGAs allowing rapid execution in hardware of that algorithm. This will allow one item of hardware, that is a pcb populated with a number of such FPGAs to be used as a prototyping tool for a variety of applications, or to behave as a so called reconfigurable hardware accelerator . This research is directed at the efficiency of the mapping process. The approach taken will be to characterise the communication mechanisms, both within a single FPGA and between multiple FPGAs. Subsequently, datapaths to be synthesised will be partioned in a manner which first allows physical implementation of the datapath, and secondly minimises execution time. The project is supported by PMeL, a British design house for FPGAs.
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Key Findings |
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This information can now be found on Gateway to Research (GtR) http://gtr.rcuk.ac.uk
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Potential use in non-academic contexts |
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This information can now be found on Gateway to Research (GtR) http://gtr.rcuk.ac.uk
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Impacts |
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| Description |
This information can now be found on Gateway to Research (GtR) http://gtr.rcuk.ac.uk |
| Summary |
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| Date Materialised |
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Sectors submitted by the Researcher |
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This information can now be found on Gateway to Research (GtR) http://gtr.rcuk.ac.uk
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| Project URL: |
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| Further Information: |
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| Organisation Website: |
http://www.abdn.ac.uk |