Details of Grant 

EPSRC Reference:	GR/K32692/01
Title:	TEST EVALUATION AND OPTIMISATION FOR ANALOGUE AND MIXED SIGNAL ICS
Principal Investigator:	Richardson, Professor A
Other Investigators:	Dorey, Professor A
Researcher Co-Investigators:
Project Partners:
Department:	Engineering
Organisation:	Lancaster University
Scheme:	Standard Research (Pre-FEC)
Starts:	01 January 1995	Ends:	30 June 1998	Value (£):	165,183
EPSRC Research Topic Classifications:	Design & Testing Technology
EPSRC Industrial Sector Classifications:
Related Grants:
Panel History:
Summary on Grant Application Form
The integration of DfT, generic fault simulation and testability analysis methodologies into the development routes of analogue and mixed signal IC's will form the essential components for the proposed test evaluation and optimisation framework. Lancaster will exploit analogue design, DfT, analogue fault simulation, defect oriented testing and modelling skills to ensure the objectives stated are achieved. Analogue and mixed signal sub-circuits will be targeted, and a fault simulation capability developed based on layout dependent defects and mixed-level modelling strategies using AHDL. This capability will enable production tests to be evaluated, optimal techniques identified and DfT specifications generated where additional access is required. DfT structures and techniques will also be developed to satisfy these specifications and support testability at the system level. DfT developments will be integrated into a demonstrator IC where feasible and fault simulation techniques verified by introducing predicted difficult to detect defects into circuit implementations with and without DfT structures. Resources required are 6 man years of effort, the SABRE simulation system, a sun workstation and PC to run essential design and simulation software and to handle all necessary documentation and communication functions.
Key Findings
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Organisation Website:	http://www.lancs.ac.uk