| EPSRC Reference: |
GR/J62708/01 |
| Title: |
SELF-TIMED LOGIC |
| Principal Investigator: |
Robinson, Professor P |
| Other Investigators: |
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| Researcher Co-Investigators: |
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| Project Partners: |
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| Department: |
Computer Science and Technology |
| Organisation: |
University of Cambridge |
| Scheme: |
Standard Research (Pre-FEC) |
| Starts: |
01 October 1994 |
Ends: |
30 September 1997 |
Value (£): |
143,703
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| EPSRC Research Topic Classifications: |
| Design & Testing Technology |
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Summary on Grant Application Form |
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The increasing complexity of integrated circuits raises difficulties in ensuring logical correctness, high speed and good manufacturing yield. Particular problems arise with timing which inhibits the composition of proven modules into a larger whole. This project is investigating the use of self-timed logic to resolve these difficulties. The work involves developing a more rigorous basis for ensuring that a component is self-timed, designing a small library of such components and incorporating them into a design system.
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Key Findings |
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This information can now be found on Gateway to Research (GtR) http://gtr.rcuk.ac.uk
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Potential use in non-academic contexts |
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This information can now be found on Gateway to Research (GtR) http://gtr.rcuk.ac.uk
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Impacts |
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| Description |
This information can now be found on Gateway to Research (GtR) http://gtr.rcuk.ac.uk |
| Summary |
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| Date Materialised |
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Sectors submitted by the Researcher |
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This information can now be found on Gateway to Research (GtR) http://gtr.rcuk.ac.uk
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| Project URL: |
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| Further Information: |
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| Organisation Website: |
http://www.cam.ac.uk |