EPSRC Reference: |
EP/X025152/1 |
Title: |
Superconducting Gatemon Quantum Computing Enabled by CryoElectronics |
Principal Investigator: |
Weides, Professor MP |
Other Investigators: |
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Researcher Co-Investigators: |
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Project Partners: |
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Department: |
School of Engineering |
Organisation: |
University of Glasgow |
Scheme: |
Standard Research |
Starts: |
16 January 2024 |
Ends: |
15 January 2027 |
Value (£): |
989,352
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EPSRC Research Topic Classifications: |
Condensed Matter Physics |
Electronic Devices & Subsys. |
Materials Characterisation |
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EPSRC Industrial Sector Classifications: |
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Related Grants: |
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Panel History: |
Panel Date | Panel Name | Outcome |
24 Jan 2023
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EPSRC ICT Prioritisation Panel January 2023
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Announced
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Summary on Grant Application Form |
Quantum processors and quantum computers employ principles of quantum mechanics to analyse, process, store and protect information. Therefore, quantum processing and computing, operating using superposition, will revolutionise our conventional way of data processing and computing in speed, power, and security, which will affect our lives, economy, and security in national and international quantities. Superconducting quantum processors on large scale with a number of quantum bits, rather than classical bits, of more than 500, are one of the most promising platforms to realise quantum computers. The quantum state of these processors, commonly known as coherence in superconducting transmons, is fragile to weak environmental perturbations such as imperfection in materials, current noise in the quantum chip, or heat load associated with the transmon qubits control and read-out electronics.
In this three years project, our team together with our project partners aim at:
(i) developing a new type of qubits that are controlled and addressed by the gate voltage, rather than conventional transmons that are operating based on current flux control lines. Our proposed qubit is known as gatemon and we aim to fabricate them on large scale in a low-loss silicon chip. Each individual gatemon will be shunted by a parallel plate capacitor in a single quantum chip. Our strategy to integrate our gatemons on large scale is to use low-loss two-dimensional materials to build the shunted capacitors. Such technology would allow us to miniaturise the footprint of our gatemon quantum chips by > 2000 times smaller. The gatemon chips will be operated at the 10mK stage of a dilution refrigerator. All fabrication and measurements will take place at the University of Glasgow James Watt Nanofabrication Centre (JWNC), and at the Centre for Quantum Technology.
(ii) developing a proof of concept modern electronics that can work at low temperatures, known as cryogenic electronics based on CMOS electronics. The chips will be mounted at the 3K stage of the dilution refrigerator to control and readout the gatemon quantum chips.
(iii) training and educating a diverse cohort of next-generation UK quantum technology students, academics, and engineers promoting capability in a research field with significant national and international economic potential and interests but with significant employment shortage.
The outputs of the SEQUENCE project will deliver a major breakthrough to quantum computing science and technology, advance low-power and reliable devices for cryoelectronic applications, and allow the technological relevance of our work to be placed on a sound footing in the industrial context.
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Key Findings |
This information can now be found on Gateway to Research (GtR) http://gtr.rcuk.ac.uk
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Potential use in non-academic contexts |
This information can now be found on Gateway to Research (GtR) http://gtr.rcuk.ac.uk
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Impacts |
Description |
This information can now be found on Gateway to Research (GtR) http://gtr.rcuk.ac.uk |
Summary |
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Date Materialised |
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Sectors submitted by the Researcher |
This information can now be found on Gateway to Research (GtR) http://gtr.rcuk.ac.uk
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Project URL: |
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Further Information: |
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Organisation Website: |
http://www.gla.ac.uk |