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Details of Grant 

EPSRC Reference: EP/T012218/1
Title: ECCS - EPSRC Development of uniform, low power, high density resistive memory by vertical interface and defect design
Principal Investigator: Driscoll, Professor JL
Other Investigators:
Researcher Co-Investigators:
Project Partners:
ARM Ltd Cambridge Display Technology Ltd (CDT) PragmatIC Printing Ltd
Purdue University University at Buffalo (SUNY)
Department: Materials Science & Metallurgy
Organisation: University of Cambridge
Scheme: Standard Research - NR1
Starts: 01 September 2019 Ends: 31 August 2022 Value (£): 384,242
EPSRC Research Topic Classifications:
Materials Characterisation Materials Processing
Materials testing & eng. Microsystems
EPSRC Industrial Sector Classifications:
Information Technologies
Related Grants:
Panel History:  
Summary on Grant Application Form
The future of energy-efficient computing will increasingly move from being compute-centric to being memory-centric. There is a huge-energy cost of storing and moving data, which is much higher than computing it. Indeed, memory dominates compute energy (>4X) in data-intensive applications. New ultralow power non-volatile memory (NVM) is central to all aspects of computing, from stand-alone, storage class memory (SCM) for use in data centres, to embedded non-volatile memory (e-NVM) for IoT, the automotive industry, etc, to new forms of computing. The area is growing hugely, along with the associated energy consumption, e.g. data centers will use >10% of global electricity by 2030 with a market growing ~10% per year, to >$150 billion by 2023. Such efficiency cannot come from processing as Moore's law reaches an end and new processor technologies are not yet established. The biggest performance and energy saving gains will be in memory. The replacement of standard memory with high performance memory NVM could reduce power usage by more than 60%.

Of the many candidate NVM forms under intense investigation, oxide resistive RAM (RRAM) has the greatest potential in terms of cost, density, simplicity and potential for 3D integration. However, several challenges currently exist, notably the need for a forming voltage, poor uniformity, scaling, and endurance. The aim of this project is to overcome these challenges. It will be done by adopting our ground-breaking results from an ideal system to an industry platform. So far, in the ideal system, we have demonstrated that a) precise and non-random conducting channels can be engineered into films to eliminate the need for a high voltage forming process; b) high and controlled oxygen vacancy concentrations lead to highly and reproducible on-off ratios; c) eliminating use of transition metals produces low leakage and strongly reduces variabilities from film to film. The industry platform we will explore in this project is doped HfO2, grown by sputtering and atomic layer deposition.

An internationally leading team with more than 15 years of very strong collaboration in the area of the proposal will undertake the work. First, growth of VAN films using pulsed laser deposition (PLD) will be undertaken at Purdue University. PLD is the simplest way to make the most perfect metal oxide films in a rapid way. These will enable us to understand the RS processes more fully and will provide information on how to grow the films by the industrially scaleable processes. Both Purdue and Cambridge will be involved in the HfO2 nanostructure film design for PLD. The knowledge from the PLD growth will then be translated to the sputtering and ALD approaches undertaken at the University of Cambridge. The effort at the University at Buffalo will focus on the fabrication and testing of prototype memristors and RRAMs using the RS films deposited by Purdue University and University of Cambridge. State-of-the art (some in-operando) characterisation tools will also be central to materials understanding and device optimisation and these will be used at Purdue and Cambridge. A very strong interaction between the groups, with regular sample and knowledge transfer will take place. Our ultimate goal is a forming free device, with on/off ratio~104, endurance >1012, <10pJ per switch, uniformity of few %, scaled to 20 nm.

In terms of training, we will educate graduates in materials sciences and electronic engineering. We will train more than 3 early career researchers in world-leading research environments in the US and UK, with several companies involved (small to large), including the Cambridge company ARM who are very active, both in the UK and US, in the memory area.

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Organisation Website: http://www.cam.ac.uk