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EPSRC Reference: EP/C509765/1
Title: Ultra-High Resolution Optical Imaging In Silicon Integrated-Circuit Inspection
Principal Investigator: Reid, Professor D
Other Investigators:
Warburton, Professor R Taghizadeh, Professor MR
Researcher Co-Investigators:
Project Partners:
NP Test
Department: Sch of Engineering and Physical Science
Organisation: Heriot-Watt University
Scheme: Standard Research (Pre-FEC)
Starts: 01 February 2005 Ends: 31 January 2008 Value (£): 268,167
EPSRC Research Topic Classifications:
Instrumentation Eng. & Dev. Lasers & Optics
EPSRC Industrial Sector Classifications:
Electronics
Related Grants:
Panel History:  
Summary on Grant Application Form
No-one can fail to be impressed at the rate at which computers and other digital devices increase annually in speed and decrease in size. These trends can be attributed to a steady fall in the feature sizes used to fabricate the integrated circuits (ICs) at the heart of modern electronic devices. (The feature size describes the smallest metal line that exists in an IC and is currently around 90nm.)Optical imaging and probing technologies play an important role in the inspection and metrology of silicon ICs. Unlike other techniques, they can operate in air and do not destroy the device under test or inhibit functional testing procedures. Optical carrier injection can be used to stimulate logic transitions at gates which are inaccessible to contact probes and optical sampling can operate at high speed without the parasitic capacitance that is associated with direct electrical measurements. (Further examples of applications of optics are given in the Case for Support.) Despite the advantages of optical techniques, their development is failing to keep pace with the projected IC feature sizes. In response to this situation we aim to demonstrate, through a combination of new resolution enhancing techniques, an optical imaging approach that will extend the lifetime of optical techniques by around a decade, making them suitable for imaging the sub-45nm devices predicted for years 2010 - 2015. [Note: sub-45nm device imaging implies an optical resolution of 90nm using consistent terminology]In what is to our knowledge an entirely novel approach we aim to combine solid-immersion imaging and nonlinear excitation to achieve free-space optical resolutions that are unprecedented, either in device imaging or in any other field. These two key approaches will be enhanced further by two other methods - super-resolution using custom aperture filters and polarisation-sensitive imaging. Super-resolution, although an old concept, is often limited practically because of the sidelobes it can introduce to an imaged point. We expect that the combination with nonlinear imaging will very successfully suppress these sidelobes and make super-resolution an effective resolution-enhancing technique in our configuration, promising around a 30% improvement. The concept of polarisation-sensitive imaging is the most speculative of the techniques we propose and relies on the preferential loss of s-polarised light at an interface. Under suitable conditions we expect to be able to enhance resolutions by around 30% when imaging layered structures or narrow junctions.Our expectation is that the unique combination of techniques should reduce the optical resolution for sub-surface IC imaging from 600nm (current state-of-the-art for industrial inspection systems) to 50 -100nm. Furthermore, the ability of our technique to image through the substrate of semiconductor device to reveal buried structures means that it should be a complementary technique to atomic force microscopy which is limited to imaging surface features because it uses a physical stylus contact. Beyond imaging silicon devices we anticipate that our technique could be more generally applied to imaging photonic crystals and laser / LED devices containing 3D structures like Bragg gratings.
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