Details of Grant 

EPSRC Reference:	EP/D025494/1
Title:	UK Support for European Doctoral Level School in Device Modelling
Principal Investigator:	Roy, Professor S
Other Investigators:	Asenov, Professor A
Researcher Co-Investigators:
Project Partners:
Department:	Electronics and Electrical Engineering
Organisation:	University of Glasgow
Scheme:	Standard Research (Pre-FEC)
Starts:	01 July 2005	Ends:	30 September 2005	Value (£):	17,574
EPSRC Research Topic Classifications:	Electronic Devices & Subsys.
EPSRC Industrial Sector Classifications:	Electronics
Related Grants:
Panel History:
Summary on Grant Application Form
This proposal provides an opportunity to ensure UK postgraduate, postdoctoral and academic participation in the first European Doctoral Level School in Device Simulation, being held at the University of Glasgow from 15th / 19th August 2005.The Summer School in Device Simulation runs as part of a European Network of Excellence, bringing together 43 Universities, Research Institutes and Companies with expertise in designing the novel nano-scale silicon transistors which will be used in digital electronic circuits such as microprocessors and advanced graphics chips post 2010 / and most importantly, the mathematical models and simulation tools which will allow computer aided design of those future electronic circuits. The summer school will provide training to both Ph.D. students and postdoctoral researchers working in the area of modelling and simulation, and to researchers in the device and circuit design communities who use simulation to obtain an in-depth understanding of present and future devices. Due to the unusually high quality of the EU and international lecturers who have agreed to present material at this summer school we propose that the EPSRC fund scholarships for 20 UK students and 5 UK academics to attend. Attendance will not only benefit the particular researchers present, and enhance the quality of their subsequent research, but will raise a level of awareness in the UK of major changes to the architecture of devices likely in future, and the effect of these architectural changes on the operation of the transistors. Such changes are required if transistors are to continue to improve in speed and power consumption. As the UK has a vibrant and growing electronic design industry, forewarning of these changes will be timely and useful.
Key Findings
This information can now be found on Gateway to Research (GtR) http://gtr.rcuk.ac.uk
Potential use in non-academic contexts
This information can now be found on Gateway to Research (GtR) http://gtr.rcuk.ac.uk
Impacts
Description This information can now be found on Gateway to Research (GtR) http://gtr.rcuk.ac.uk Summary Date Materialised
Sectors submitted by the Researcher
This information can now be found on Gateway to Research (GtR) http://gtr.rcuk.ac.uk
Project URL:
Further Information:
Organisation Website:	http://www.gla.ac.uk